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| MC74VHC157 Quad 2- Channel Multiplexer The MC74VHC157 is an advanced high-speed CMOS quad 2-channel multiplexer, fabricated with silicon gate CMOS technology. It achieves high-speed operation similar to equivalent Bipolar-Schottky TTL, while maintaining CMOS low-power dissipation. It consists of four 2-input digital multiplexers with common select (S) and enable (E) inputs. When E is held High, selection of data is inhibited and all the outputs go Low. The select decoding determines whether the A or B inputs get routed to the corresponding Y outputs. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7 V, allowing the interface of 5 V systems to 3 V systems. http://onsemi.com MARKING DIAGRAMS 16 9 SOIC-16 D SUFFIX CASE 751B VHC157 AWLYYWW 1 8 * * * * * * * * * * * * High Speed: tPD = 4.1 ns (Typ) at VCC = 5 V Low Power Dissipation: ICC = 4 mA (Max) at TA = 25C High Noise Immunity: VNIH = VNIL = 28% VCC Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2 V to 5.5 V Operating Range Low Noise: VOLP = 0.8 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300 mA ESD Performance: HBM > 2000 V; Machine Model > 200 V Chip Complexity: 82 FETs These devices are available in Pb-free package(s). Specifications herein apply to both standard and Pb-free devices. Please see our website at www.onsemi.com for specific Pb-free orderable part numbers, or contact your local ON Semiconductor sales office or representative. 16 9 TSSOP-16 DT SUFFIX CASE 948F VHC 157 ALYW 1 8 16 9 SOIC EIAJ-16 M SUFFIX CASE 966 74VHC157 ALYW 1 8 S A0 B0 Y0 A1 B1 Y1 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC E A3 B3 Y3 A2 B2 Y2 A L, WL Y, YY W, WW = Assembly Location = Wafer Lot = Year = Work Week ORDERING INFORMATION Device MC74VHC157D MC74VHC157DR2 MC74VHC157DT Package SOIC--16 SOIC--16 TSSOP--16 Shipping 48 Units/Rail 2500 Units/Reel 96 Units/Rail MC74VHC157DTR2 TSSOP--16 2500 Units/Reel MC74VHC157M MC74VHC157MEL SOIC EIAJ--16 SOIC EIAJ--16 50 Units/Rail 2000 Units/Reel Figure 1. Pin Assignment (c) Semiconductor Components Industries, LLC, 2006 March, 2006 - Rev. 5 - 1 Publication Order Number: MC74VHC157/D MC74VHC157 A0 B0 A1 B1 NIBBLE INPUTS A2 B2 A3 B3 E S 2 3 5 6 11 10 14 13 15 1 12 Y3 9 Y2 7 Y1 DATA OUTPUTS 4 Y0 Figure 2. Expanded Logic Diagram E S A0 B0 A1 B1 15 1 2 3 5 6 EN G1 1 1 MUX 4 7 9 12 Y0 Y1 Y2 Y3 11 A2 10 B2 14 A3 13 B3 Figure 3. IEC Logic Symbol FUNCTION TABLE Inputs E H L L S X L H Outputs Y0 - Y3 L A0--A3 B0--B3 A0 -- A3, B0 -- B3 = the levels of the respective Data--Word Inputs. http://onsemi.com 2 MC74VHC157 MAXIMUM RATINGS (Note 1) Symbol VCC VI VO IIK IOK IO ICC TSTG TL TJ JA PD MSL FR VESD DC Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Sink Current DC Supply Current per Supply Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature under Bias Thermal Resistance Power Dissipation in Still Air at 85_C Moisture Sensitivity Flammability Rating ESD Withstand Voltage Oxygen Index: 30% -- 35% Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Above VCC and Below GND at 85_C (Note 5) VI < GND VO < GND Parameter Value -0.5 to +7.0 -0.5 to VCC +7.0 -0.5 to VCC +7.0 -20 20 25 100 -65 to +150 260 +150 250 250 Level 1 UL--94--VO (0.125 in) >2000 >200 N/A 500 V Unit V V V mA mA mA mA _C _C _C _C/W mW ILatch--Up Latch--Up Performance mA 1. Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Extended exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum--rated conditions is not implied. 2. Tested to EIA/JESD22--A114--A. 3. Tested to EIA/JESD22--A115--A. 4. Tested to JESD22--C101--A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN VOUT TA tr, tf DC Supply Voltage DC Input Voltage DC Output Voltage Operating Temperature Range, all Package Types Input Rise or Fall Time VCC = 3.3 V 0.3 V VCC = 5.0 V 0.5 V (Note 6) Characteristics Min 2.0 0 0 -55 0 0 Max 5.5 5.5 VCC 125 100 20 Unit V V V _C ns/V 6. Unused inputs may not be left open. All inputs must be tied to a high--logic voltage level or a low--logic input voltage level. NORMALIZED FAILURE RATE DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES Junction Temperature _C 80 90 100 110 120 130 140 Time, Hours 1,032,200 419,300 178,700 79,600 37,000 17,800 8,900 Time, Years 117.8 47.9 20.4 9.4 4.2 2.0 1.0 FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 130_C TJ = 120_C TJ = 100_C TJ = 110_C TJ = 90_C TJ = 80_C 100 TIME, YEARS 1 1 10 1000 Figure 4. Failure Rate vs. Time Junction Temperature http://onsemi.com 3 MC74VHC157 DC CHARACTERISTICS (Voltages Referenced to GND) VCC Symbol VIH VIL VOH Parameter High--Level Input Voltage Low--Level Input Voltage High--Level Output Voltage VIN = VIH or VIL IOH = --50 mA VIN = VIH or VIL IOH = --4 mA IOH = --8 mA VOL Low--Level Output Voltage VIN = VIH or VIL IOL = 50 mA VIN = VIH or VIL IOH = 4 mA IOH = 8 mA IIN ICC Input Leakage Current Quiescent Supply Current VIN = 5.5 V or GND VIN = VCC or GND Condition (V) 2.0 3.0 to 5.5 2.0 3.0 to 5.5 2.0 3.0 4.5 3.0 4.5 2.0 3.0 4.5 3.0 4.5 0 to 5.5 5.5 1.9 2.9 4.4 2.58 3.94 0.0 0.0 0.0 0.1 0.1 0.1 0.36 0.36 0.1 4.0 2.0 3.0 4.5 Min 1.5 0.7 VCC 0.5 0.3 VCC 1.9 2.9 4.4 2.48 3.8 0.1 0.1 0.1 0.44 0.44 1.0 40.0 TA = 25_C Typ Max TA 85_C Min 1.5 0.7 VCC 0.5 0.3 VCC 1.9 2.9 4.4 2.34 3.66 0.1 0.1 0.1 0.52 0.52 1.0 40.0 mA mA V Max -55_C TA125_C Min 1.5 0.7 VCC 0.5 0.3 VCC Max Unit V V V AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) TA = 25_C Symbol tPLH, tPHL Characteristic Propagation Delay, A to B to Y Test Conditions VCC = 3.3 0.3 V VCC = 5.0 0.5 V tPLH, tPHL Propagation Delay, S to Y VCC = 3.3 0.3 V VCC = 5.0 0.5 V tPLH, tPHL Propagation Delay, E to Y VCC = 3.3 0.3 V VCC = 5.0 0.5 V CIN Input Capacitance CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF Min Typ 6.2 8.7 4.1 5.6 8.4 10.9 5.3 6.8 8.7 11.2 5.6 7.1 4 Max 9.7 13.2 6.4 8.4 13.2 16.7 8.1 10.1 13.6 17.1 8.6 10.6 10 TA 85_C Typ 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max 11.5 15.0 7.5 9.5 15.5 19.0 9.5 11.5 16.0 19.5 10.0 12.0 10 Typical @ 25_C, VCC = 5.0 V CPD Power Dissipation Capacitance (Note 7) 20 pF 7. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no--load dynamic power consumption: PD = CPD VCC2 fin + ICC VCC. -55_C TA125_C Typ 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max 11.5 15.0 7.5 9.5 15.5 19.0 9.5 11.5 16.0 19.5 10.0 12.0 10 pF ns ns Unit ns http://onsemi.com 4 MC74VHC157 NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V) TA = 25_C Symbol VOLP VOLV VIHD VILD Characteristic Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum High Level Dynamic Input Voltage Maximum Low Level Dynamic Input Voltage Typ 0.3 -0.3 Max 0.8 -0.8 3.5 1.5 Unit V V V V VCC A, B, or S 50% tPLH Y 50% VCC tPHL GND E VCC 50% tPLH tPHL 50% VCC GND Y Figure 5. Switching Waveform Figure 6. Inverting Switching TEST POINT OUTPUT DEVICE UNDER TEST CL* *Includes all probe and jig capacitance. Figure 7. Test Circuit INPUT Figure 8. Input Equivalent Circuit http://onsemi.com 5 MC74VHC157 PACKAGE DIMENSIONS SOIC-16 D SUFFIX CASE 751B--05 ISSUE J --A16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 --B1 8 P 8 PL 0.25 (0.010) M B S G F K C --TSEATING PLANE R X 45 _ M D 16 PL M J 0.25 (0.010) TB S A S 16X K REF TSSOP DT SUFFIX CASE 948F--01 ISSUE O M 0.10 (0.004) 0.15 (0.006) T U S TU S V S K K1 16 9 2X L/2 J1 B --USECTION N-N J L PIN 1 IDENT. 1 8 N 0.15 (0.006) T U S 0.25 (0.010) M A --VN F DETAIL E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE --W--. DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 -----1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.18 0.28 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 -----0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.007 0.011 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ C 0.10 (0.004) - - SEATING -TPLANE --W- D G H DETAIL E http://onsemi.com 6 MC74VHC157 PACKAGE DIMENSIONS SOIC EIAJ-16 M SUFFIX CASE 966--01 ISSUE O 16 9 LE Q1 E HE M_ L DETAIL P 1 8 Z D A VIEW P c NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX -----2.05 0.05 0.20 0.35 0.50 0.18 0.27 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 -----0.78 INCHES MIN MAX -----0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 -----0.031 e b 0.13 (0.005) M A1 0.10 (0.004) ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800--282--9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082--1312 USA Phone: 480--829--7710 or 800--344--3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2--9--1 Kamimeguro, Meguro--ku, Tokyo, Japan 153--0051 Fax: 480--829--7709 or 800--344--3867 Toll Free USA/Canada Phone: 81--3--5773--3850 Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 7 MC74VHC157/D |
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